Alpha-Power Law MOSFET Model and its Applications to CMOS Inverter Delay and Other Formulas

A simple yet realistic MOS model, namely the a-power law MOS model, is introduced to include the carrier velocity saturation effect, which becomes eminent in short-channel MOSFET’s. The model is an extension of Shockley’s square-law MOS model in the saturation region. Since the model is simple, it can be applied for handling MOSFET circuits analytically and can predict the circuit behavior in the submicrometer region. Using the model, closed-form expressions are derived for the delay, the short-circuit power, and the transition voltage of CMOS inverters. The resultant delay expression includes input waveform slope effects and parasitic drain/source resistance effects and can be used in simulation and/or optimization CAD tools. It is concluded that the CMOS inverter delay becomes less sensitive to the input waveform slope and short-circuit dissipation increases as the carrier velocity saturation effects get severer in short-channel MOSFET’s.